Biography
Prof. Hayden K.-H. So received his B.S., M.S., and Ph.D. degrees in electrical engineering and computer sciences from the University of California, Berkeley in 1998, 2000, and 2007, respectively. He is currently an Associate Professor and previously the co-director of the computer engineering program at the Department of Electrical and Computer Engineering, University of Hong Kong. He is also the co-director and founding member of the Joint Lab on Future Cities at the University of Hong Kong. His research focuses on highly efficient reconfigurable computing system designs and their applications. He has been awarded the CODES+ISSS Test-of-Time award, in 2021, the IEEE-HKN C. Holmes MacDonald Outstanding Teaching Award, in 2021, the Croucher Innovation Award, in 2013, and the University Outstanding Teaching Award in 2012. He is an active member of the international reconfigurable computing community, having served as organizer and technical program chairs of many flagship international conferences in the field, including FCCM, FPL, FPT, ASAP, ARC, HEART, ReConFig, and HiPEAC. He was a cofounder of the International Workshop on Overlay Architecture for FPGA (OLAF) and is a frequent reviewer for journals including ACM TRETS, ACM TACO, IEEE TPDS, etc.
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Selected Publications
- Y. Gao, B. Zhang, Y. Ding, and H. K.-H. So, “A Composable Dynamic Sparse Dataflow Architecture for Efficient Event-based Vision Processing on FPGA,” in Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 246-257, 2024. [doi>10.1145/3626202.3637558]
- Y. Gao, S. Wang, and H. K.-H. So, “A Reconfigurable Architecture for Real-Time Event-Based Multi-Object Tracking,” ACM Trans. Reconfigurable Technol. Syst., apr, 2023. [doi>10.1145/3593587]
- M. Wang, I. McInerney, B. Stellato, S. Boyd, and H. K.-H. So, “RSQP: Problem-Specific Architectural Customization for Accelerated Convex Quadratic Optimization,” in Proceedings of the 50th Annual International Symposium on Computer Architecture (ISCA), 2023. [doi>10.1145/3579371.3589108][pdf]
- Y. Ding, J. Wu, Y. Gao, M. Wang, and H. K.-H. So, “Model-Platform Optimized Deep Neural Network Accelerator Generation through Mixed-Integer Geometric Programming,” in 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 83-93, 2023. [doi>10.1109/FCCM57271.2023.00018][pdf]
- J. Wu, J. Zhou, Y. Gao, Y. Ding, N. Wong, and H. K.-H. So, “MSD: Mixing Signed Digit Representations for Hardware-efficient DNN Acceleration on FPGA with Heterogeneous Resources,” in 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 94-104, 2023. [doi>10.1109/FCCM57271.2023.00019][pdf]