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X-ORIGINAL-URL:https://ece.hku.hk
X-WR-CALDESC:Events for Department of Electrical and Computer Engineering (HKUECE) 電機與計算機工程系
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TZID:Asia/Hong_Kong
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DTSTART:20240101T000000
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DTSTART;TZID=Asia/Hong_Kong:20250509T150000
DTEND;TZID=Asia/Hong_Kong:20250509T160000
DTSTAMP:20260509T211546
CREATED:20250603T035916Z
LAST-MODIFIED:20250603T035916Z
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SUMMARY:WireLightning: Harnessing Capacitances for In-Transit Massively Parallel Matrix Multiplication
DESCRIPTION:Zoom Link: https://hku.zoom.us/j/3837289217?omn=95617077246 \nAbstract\nAnalog computing-in-memory accelerators promise ultra-low-power\, on-device AI by reducing data transfer and energy usage. Yet inherent device variations and high energy consumption for analog-digital conversion continue to hinder their wide-scale adoption in mainstream systems. To address these issues\, this presentation will introduce WireLightning\, a novel capacitive-computing accelerator featuring a mixed-signal architecture that rethinks analog AI acceleration. Unlike conventional analog crossbars that encode weights in programmable devices\, WireLightning exploits intrinsic charge dynamics in passive capacitors\, encoding matrix multiplication through spike amplitude and timing. This design addresses critical limitations such as weight drift\, stochasticity\, and power-intensive ADC bottlenecks. Key innovations include: amplitude-temporal dual encoding that enables constant-time analog dot-products; time-based decoding scheme that significantly reduces reliance on power-intensive ADCs; row-wise parallel architecture for concurrent dot-product calculations across multiple rows to enhance throughput; and value repetition exploitation in low-bit quantized vectors to reduce multiplications to constant time complexity. A PCB prototype achieved higher accuracies than leading RRAM crossbar and PCM crossbar implementations. Implemented in a 40-nm CMOS technology\, WireLightning demonstrate superior potential in power efficiency\, while maintaining high precision. By integrating algorithm-circuit co-design with physical computing\, this work establishes capacitive computing as a promising path toward combining digital precision and analog efficiency in next-generation edge AI. \nSpeaker\nSpeaker: Mr. WANG Song\nDepartment of Electrical and Electronic Engineering\nThe University of Hong Kong \nSpeaker’s Biography\nSong Wang received the B.Eng. degree in the Department of Automated Test and Control at Harbin Institute of Technology\, and M.Phil. degree in the Department of Mechanical Engineering at the University of Hong Kong. He is currently pursuing the Ph.D. degree in the Department of Electrical and Electronic Engineering at the University of Hong Kong\, under the supervision of Prof. Hayden So. His research interests include AI chip\, computer architecture\, and reconfigurable computing. \n\nAll are welcome!
URL:https://ece.hku.hk/events/20250509-1/
LOCATION:Online via Zoom
CATEGORIES:Highlights,Seminar
ATTACH;FMTTYPE=image/jpeg:https://ece.hku.hk/wp-content/uploads/2024/11/rpg-seminar.jpg
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