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X-WR-CALDESC:Events for Department of Electrical and Computer Engineering (HKUECE) 電機與計算機工程系
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TZID:Asia/Hong_Kong
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DTSTART:20230101T000000
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DTSTART;TZID=Asia/Hong_Kong:20241204T100000
DTEND;TZID=Asia/Hong_Kong:20241204T113000
DTSTAMP:20260512T065541
CREATED:20241127T084902Z
LAST-MODIFIED:20250114T025206Z
UID:19511-1733306400-1733311800@ece.hku.hk
SUMMARY:EPFL’s Centers Blueprint to Revolutionize Sustainable AI Co-Design and Optimization
DESCRIPTION:Abstract\nArtificial Intelligence (AI) is transforming our world by including self-learning capabilities or extracting intriguing hidden patterns from input data. While the cloud-based computing paradigm has been a baseline approach for AI inferences in recent years\, technological advances and AI optimization methods advocate a shift toward an edge-computing alternative. Nevertheless\, combining cloud computing with the new edge AI paradigm poses storage\, computational\, and efficient communication challenges that must be addressed to support the deployment of compute-intense algorithms in embedded devices. In particular\, with the continuous increase in the quality of their outputs\, large AI models trained in the cloud have high memory and computing requirements that strain our natural resources worldwide and limit their porting in edge nodes. \nAware of this challenge\, the Swiss Federal Institute of Technology Lausanne (EPFL) is studying the problem from different perspectives by combining the works of its different Research Centers. Accordingly\, this presentation will first cover how a multi-center focused approach (in close collaboration with key industrial players) was used to conceive a new energy-efficient AI supercomputer and sustainable data center to explore the cooperation of cloud and edge AI systems. Second\, this presentation will cover a new co-design strategy for new edge AI systems that interact with the latest sustainable data center designs. This new co-design strategy advocates hardware-aware algorithmic transformations of large AI systems to enable accuracy-driven embedded ensembles of convolutional Neural Networks (ECNNs) to improve the accuracy and robustness of final edge devices. Third\, this presentation will discuss the possible use of codebook-based representations\, approximate computing\, and in-memory computing accelerators to reduce further the energy consumption of the next-generation edge AI systems. \nSpeaker\nProf. David Atienza\nEmbedded Systems Laboratory (ESL)\,\nEcole Polytechnique Federale de Lausanne (EPFL)\,\nLausanne\, Switzerland \nBiography of the Speaker\nDavid Atienza is a Professor of Electrical and Computer Engineering\, Heads the Embedded Systems Laboratory (ESL)\, and is the Associate Vice President of Research Centers and Plaforms for the period 2024-2028 at Ecole Polytechnique Federale de Lausanne (EPFL)\, Switzerland. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) targeting low-power Cyber-Physical Systems (CPS) and energy-efficient computing servers. His latest works include new 2.5D/3D power/thermal-aware design and architectures for MPSoCs targeting edge AI systems\, as well as HW/SW co-design and AI-based multi-level optimization for sustainable computing in the Internet of Things (IoT) context. \nProf. David Atienza has co-authored over 450 papers\, one book\, and 14 patents in these previous areas. He has also received multiple recognitions and awards\, among them the IEEE/ACM HW/SW Co-Design Conference (CODES-ISSS) 2024 Test-of-Time Award for the most influential paper in the last 15 years\, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020\, the Design Automation Conference (DAC) Under-40 Innovators Award in 2018\, and IEEE CEDA and ACM SIGDA Early Career Awards on EDA tools and systems research. He is a Fellow of IEEE\, Fellow of ACM\, and has been the Chair of the European Design Automation Association (EDAA) since 2022 until 2024. He is currently the Editor-in-Chief of IEEE Trans. on CAD (TCAD) and ACM Computing Surveys. \nOrganiser\nProf. Kaibin Huang\nDepartment of Electrical and Electronic Engineering\,\nThe University of Hong Kong \nCo-organiser\nProf. Xianhao Chen\nDepartment of Electrical and Electronic Engineering\,\nThe University of Hong Kong \nAll are welcome!
URL:https://ece.hku.hk/events/20241204-1/
LOCATION:Room CB-603\, 6/F\, Chow Yei Ching Building\, The University of Hong Kong
CATEGORIES:Seminar
ATTACH;FMTTYPE=image/jpeg:https://ece.hku.hk/wp-content/uploads/2025/01/1280-3.jpg
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